[Lecture] Architecture and Software Optimizations for Future Memory Technology
Update Time:2023-06-26 15:15:00

TopicArchitecture and Software Optimizations for Future Memory Technology

LecturerDr. Jia Raothe University of Texasat Arlington

Time10:00 a.m. - 11:10 a.m.,Wednesday, June 28, 2023, UTC+8

VenueRoom 1106, the main building of the North Area of Nanhu Campus

InviterProfessor Xia Zhe


Abstract:

The rapidly increasing number of cores in modern processors and the difficulties in scaling DRAM-based main memory have led to a widening gap between processor and memory speeds. In this talk, two recent trends to scale memory capacity vertically and horizontally, the challenges and opportunities in vertical and horizontal memory scalingwill be discussed. And the recent work of Dr. Jia Raos team on characterizing and optimizing the performance of Intel Optane persistent memory and tiered memory managementwill be presented.


Biography:

Dr. Jia Rao is currently an Associate Professor at the University of Texasat Arlington. His research lies broadly in the area of Operating Systems, Parallel and Distributed Computing, and Cloud Computing. His recent focus is on performance optimization and system support for emerging hardware devices and machine learning workloads. His work has been published in prestigious conferences, such as EuroSys, USENIX ATC, HPCA, HPDC, etc. Highlights of Dr. Rao's research include a National Science Foundation (NSF) CAREER award, best paper awards at variousc onferences. Dr. Jia Rao received his B.S. and M.S. degrees in Computer Science from Wuhan University in 2004 and 2006, respectively, and a Ph.D. degree in Computer Engineering from Wayne State University in 2011.


Source: School of Computer Science and Artificial Intelligence

Edited by: Li Tiantian